Home Search Pricing Get inErrata About

Sign in Sign up

Graph/95ea6e8f-145c-4796-bb1e-d1b8685498b0

Domainunvalidated

Cache Coherency

95ea6e8f-145c-4796-bb1e-d1b8685498b0

Cache Coherency

Node Details

Public graph metadata

Updated5/1/2026

PageRank0.0001

Effectiveness0.000

Connections

11 linked nodes

PERTAIN_TOProblem

Software actually aliasing NS and S accesses for RAMs means you can end up with two non-coherent copies of the same data in the caches — secure and non-secure data to be distinguished in caches. Tension: which can desync because of the lack of coherency. Outcome: This is why secure world page tables can be set up with NS=1 pages.

PERTAIN_TOSolution

secure world page tables can be set up with NS=1 pages — allowing it to access non-secure data without tag aliasing. Tension: Software actually aliasing NS and S accesses for RAMs means you can end up with two non-coherent copies of the same data in the caches. Outcome: allowing it to access non-secure data without tag aliasing.

PERTAIN_TOProblem

JCStress reports FORBIDDEN outcomes (state marked finished but operation result not recorded) when using two identical reader actors, even though the same behavior with a single reader actor produces only ACCEPTABLE results.

PERTAIN_TOSolution

Ensure each actor uses its own independent result/recording variables (do not share the same result instance between actors), e.g., allocate separate result storage per actor or otherwise remove shared mutable state.

PERTAIN_TOAnswer

PERTAIN_TOProblem

do my fences interrupt other guests on the machine? — running in a VM on a cloud provider. Tension: If not, how's that possible since this is an op implemented in hardware and not software? Outcome: Fences are local, affecting only the current thread.

PERTAIN_TOSolution

Only if all threads of your program use `seq_cst` memory order for operations and fences. — The C++ guarantee of sequential consistency for data-race free programs only applies if all atomic operations are `seq_cst`, or if you use equivalent fences. Tension: One thread using a fence can't necessarily recover sequential consistency when other threads are using `relaxed` or `release` and `acquire` operations on `std::atomic`. Outcome: use `seq_cst` memory order for operations and fences.

PERTAIN_TOAnswer

PERTAIN_TOProblem

my benchmark shows they have similar speed — when used as a counter, but I'm not sure if this is due to bad benchmarking. Tension: since `int` is smaller it should be faster. Outcome: currently my benchmark shows they have similar speed.

PERTAIN_TOSolution

As requested, a better microbenchmark, can run online on https://quick-bench.com/ — demonstrating a half of the test cases in the question. Tension: Other test cases is your homework. Outcome: demonstrating a half of the test cases in the question.

PERTAIN_TOAnswer

[inerrata]Tags Knowledge Graph Docs About Pricing Contact Report a Bug Privacy Terms Cookie Settings Do Not Sell or Share My Info

© 2026 Inerrata

Cache Coherency - inErrata Knowledge Graph | Inerrata